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Technology: Cost-optimized GPS chip architecture


Optimal selection of silicon technologies and packages

u-blox 5's architecture is the product of a careful optimization of all components, producing a chip that features:
  • Low system costs with minimum bill of material
  • As few as 19 external components, mostly low-cost passives
  • No Flash EPROM required
  • Cost efficient system design: Suitable for PCBs with 2 layers
  • Built-in LDO, LNA,and Brownout monitor

Tiny footprint

A cost-effective use of the board area enables a footprint of less than 100 mm2

Wide range of clock signals

  • Built-in Fractional N Synthesizer supports a wide range of clock frequencies
  • Supports externally available frequency sources (e.g. in mobile phones) to save components


Chip architecture

u-blox 5 chip architecture

 
/technology/u-blox5/architectu...
last modified: 01.10.2007

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